前两天看了S3C6410时钟部分代码,发现在Linux中没有设置时钟,时钟是u-boot中设置好的,Linux启动时直接读取PLL寄存器中的数据。
刚才浏览了下u-boot中的smdk6410.h文件,发现调整时钟的宏三星已经定义好了: //#define CONFIG_CLK_800_133_66 #define CONFIG_CLK_666_133_66 //#define CONFIG_CLK_532_133_66 //#define CONFIG_CLK_400_133_66 //#define CONFIG_CLK_400_100_50 //#define CONFIG_CLK_OTHERS 将友坚6410的时钟升级的666只需要注释 //#define CONFIG_CLK_532_133_66 打开 #define CONFIG_CLK_666_133_66 再重新编译u-boot即可 ================================================================================== CPU: S3C6410@666MHz Fclk = 666MHz, Hclk = 133MHz, Pclk = 66MHz, Serial = CLKUART (ASYNC Mode) Board: SMDK6410 DRAM: 128 MB Flash: 0 kB NAND: 256 MB ================================================================================== Uncompressing Linux.......................................................................................................................... done, booting the kernel. Linux version 2.6.24.2 (kyon@SEP4020.Linux) (gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) ) #348 Wed Jul 29 15:26:11 CST 2009 CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f Machine: SMDK6410 Ignoring unrecognised tag 0x00000000 Memory policy: ECC disabled, Data cache writeback CPU S3C6410 (id 0x36410101) S3C6410: core 666.000 MHz, memory 133.000 MHz, peripheral 66.500 MHz S3C6410: EPLL 192.000 MHz S3C64XX Clocks, (c) 2007 Samssung Electronics ================================================================================== Uncompressing Linux...................................................................................................... done, booting the kernel. Linux version 2.6.29 (kyon@SEP4020.Linux) (gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) ) #48 PREEMPT Mon Jul 13 17:25:14 CST 2009 CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache Machine: SMDK6410 Memory policy: ECC disabled, Data cache writeback CPU S3C6410 (id 0x36410101) S3C24XX Clocks, (c) 2004 Simtec Electronics S3C64XX: PLL settings, A=666000000, M=532000000, E=24000000 S3C64XX: HCLK2=266000000, HCLK=133000000, PCLK=66500000 mout_apll: source is fout_apll (1), rate is 666000000 ==================================================================================
仅仅知道如何修改当然是不够的,还要看看为什么这样改: S3C6410的时钟公式基本上和S3C2410一样:Fclk=(m×Fin)/(p×(2^s)) Fin是外接晶振12MHz 对于666主频,m=333,p=3,s=1,333*12/(3*2^1)=333*12/6=666 在smdk6410.h中有如下定义,532和666的区别一目了然,其实就是APLL_MDIV一个是333一个是266而已 #if defined(CONFIG_CLK_666_133_66) /* FIN 12MHz, Fout 666MHz */ #define APLL_MDIV 333 #define APLL_PDIV 3 #define APLL_SDIV 1 #undef CONFIG_SYNC_MODE /* ASYNC MODE */ #elif defined(CONFIG_CLK_532_133_66) /* FIN 12MHz, Fout 532MHz */ #define APLL_MDIV 266 #define APLL_PDIV 3 #define APLL_SDIV 1 #define CONFIG_SYNC_MODE #define APLL_VAL set_pll(APLL_MDIV, APLL_PDIV, APLL_SDIV) 下面这个宏定义设置PLL的值 在board/samsung/smdk6410/lowlevel_init.S中有用到 ldr r1, =APLL_VAL str r1, [r0, #APLL_CON_OFFSET] //这里写APLL_CON寄存器 ldr r1, =MPLL_VAL str r1, [r0, #MPLL_CON_OFFSET] //这里写MPLL_CON寄存器 ldr r1, =0x80200203 /* FOUT of EPLL is 96MHz */ str r1, [r0, #EPLL_CON0_OFFSET] ldr r1, =0x0 str r1, [r0, #EPLL_CON1_OFFSET] ldr r1, [r0, #CLK_SRC_OFFSET] /* APLL, MPLL, EPLL select to Fout */ >#if defined(CONFIG_CLKSRC_CLKUART) > ldr r2, =0x2007 >#else > ldr r2, =0x7 >#endif > orr r1, r1, r2 > > str r1, [r0, #CLK_SRC_OFFSET] > > /* wait at least 200us to stablize all clock */ > mov r1, #0x10000 >1: subs r1, r1, #1 > bne 1b 这样S3C6410的时钟就被初始化为666MHz了。 说来我曾经在Linux初始化clokc的代码中强行将APLL_CON寄存器中的mdiv置为333。
val = 0xc14d0301; //原来是0xc10a0301 其中的14d就是333 10a为266 __raw_writel(val, S3C_APLL_CON); 结果初始化后就输出乱码的,不过LCD输出正常,看来uart的时钟和频率相关,需要修正。 将S3C6410频率提升至666M
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