FEATURES
?131,072bytesby8-bitorganization
?Fastaccesstime:70ns(Vcc:5V±5%;CL:35pF)
90/120ns(Vcc:5V±10%;CL:100pF)
?Lowpowerconsumption
–50mAmaximumactivecurrent
–100uAmaximumstandbycurrent
?Programminganderasingvoltage12V±5%
?Commandregisterarchitecture
–ByteProgramming(15ustypical)
–Autochiperase5secondstypical
(includingpreprogrammingtime)
–BlockErase
?Optimizedhighdensityblockedarchitecture
–Four4-KBblocks
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REV.1.6,JAN.19,1999
GENERALDESCRIPTION
TheMX28F1000Pisa1-megabitFlashmemoryor-
ganizedas128Kbytesof8bitseach.MXIC''sFlash
memoriesofferthemostcost-effectiveandreliable
read/writenon-volatilerandomaccessmemory.The
MX28F1000Pispackagedin32-pinPDIP,PLCC
andTSOP.Itisdesignedtobereprogrammedand
erasedin-systemorin-standardEPROMprogram-
mers.
ThestandardMX28F1000Poffersaccesstimesas
fastas70ns,allowingoperationofhigh-speed
microprocessorswithoutwaitstates.Toeliminate
buscontention,theMX28F1000Phasseparatechip
enable(CE)andoutputenable(OE)controls.
MXIC''sFlashmemoriesaugmentEPROMfunction-
alitywithin-circuitelectricalerasureand
programming.TheMX28F1000Pusesacommand
registertomanagethisfunctionality,while
maintainingastandard32-pinpinout.The
commandregisterallowsfor100%TTLlevelcontrol
inputsandfixedpowersupplylevelsduringerase
andprogramming,whilemaintainingmaximum
EPROMcompatibility.
MXICFlashtechnologyreliablystoresmemorycon-
tentsevenafter10,000eraseandprogramcycles.
TheMXICcellisdesignedtooptimizetheeraseand
programmingmechanisms.Inaddition,thecombi-
nationofadvancedtunneloxideprocessingandlow
internalelectricfieldsforeraseandprogramming
operationsproducesreliablecycling.The
MX28F1000Pusesa12.0V±5%VPPsupplyto
performtheAutoProgram/Erasealgorithms.
Thehighestdegreeoflatch-upprotectionis
achievedwithMXIC''sproprietarynon-epiprocess.
Latch-upprotectionisprovedforstressesupto100
milliampsonaddressanddatapinfrom-1VtoVCC
+1V.
–Seven16-KBblocks
?AutoErase(chip&block)andAutoProgram
–DATApolling
–Togglebit
?10,000minimumerase/programcycles
?Latch-upprotectedto100mAfrom-1toVCC+1V
?AdvancedCMOSFlashmemorytechnology
?CompatiblewithJEDEC-standardbyte-wide32-pin
EPROMpinouts
?Packagetype:
–32-pinplasticDIP
–32-pinPLCC
–32-pinTSOP(Type1)
MX28F1000P
1M-BIT[128Kx8]CMOSFLASHMEMORY
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REV.1.6,JAN.19,1999
MX28F1000P
MX28F1000PBlockAddressandBlockStructure
4k
4k
4k
4k
1FFFF
1F000
1EFFF
1E000
1DFFF
1D000
1CFFF
1C000
1BFFF
00000
11111
11110
11101
11100
A16A15A14A13A12A[16:0]
16k
18000
17FFF
110XX
16k
14000
13FFF
101XX
16k
10000
0FFFF
100XX
16k
0C000
0BFFF
011XX
16k
08000
07FFF
010XX
16k
04000
03FFF
001XX
000XX
16k
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REV.1.6,JAN.19,1999
MX28F1000P
SYMBOLPINNAME
A0~A16AddressInput
Q0~Q7DataInput/Output
CEChipEnableInput
OEOutputEnableInput
WEWriteenablePin
VPPProgramSupplyVoltage
VCCPowerSupplyPin(+5V)
GNDGroundPin
PINCONFIGURATIONS
32PDIP
TSOP(TYPE1)
(REVERSETYPE)
(NORMALTYPE)
PINDESCRIPTION:
32PLCC
MX28F1000P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
WE
NC
A14
A13
A8
A9
A11
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
14
5
9
13
141720
21
25
29
3230
A14
A13
A8
A9
A11
OE
A10
CE
Q7
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1Q2
VSS
Q3Q4Q5Q6
A12A15A16VPPVCCWENC
MX28F1000P
A11
A9
A8
A13
A14
NC
WE
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MX28F1000P
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
A14
NC
WE
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
MX28F1000P
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REV.1.6,JAN.19,1999
MX28F1000P
BLOCKDIAGRAM
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGHVOLTAGE
MODE
LOGIC
STATE
REGISTERMX28F1000P
FLASH
ARRAY
X-DECODER
ADDRESS
LATCH
AND
BUFFER
Y-PASSGATE
Y
-DECODER
ARRAY
SOURCE
HV
COMMAND
DATA
DECODER
COMMAND
DATALATCH
I/OBUFFER
PGM
DATA
HV
PROGRAM
DATALATCH
SENSE
AMPLIFIER
Q0-Q7
A0-A16
CE
OE
WE
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REV.1.6,JAN.19,1999
MX28F1000P
AUTOMATICPROGRAMMING
TheMX28F1000Pisbyteprogrammableusingthe
AutomaticProgrammingalgorithm.TheAutomatic
Programmingalgorithmdoesnotrequirethesystemto
timeoutorverifythedataprogrammed.Thetypical
roomtemperaturechipprogrammingtimeofthe
MX28F1000Pislessthan5seconds.
AUTOMATICCHIPERASE
ThedevicemaybeerasedusingtheAutomaticErase
algorithm.TheAutomaticErasealgorithmautomati-
callyprogramstheentirearraypriortoelectricalerase.
Thetimingandverificationofelectricaleraseare
controlledinternaltothedevice.
AUTOMATICBLOCKERASE
TheMX28F1000Pisblock(s)erasableusingMXIC''s
AutoBlockErasealgorithm.Blockerasemodesallow
blocksofthearraytobeerasedinoneerasecycle.
TheAutomaticBlockErasealgorithmautomatically
programsthespecifiedblock(s)priortoelectrical
erase.Thetimingandverificationofelectricalerase
arecontrolledinternaltothedevice.
AUTOMATICPROGRAMMINGALGORITHM
MXIC''sAutomaticProgrammingalgorithmrequires
theusertoonlywriteaprogramset-upcommandand
aprogramcommand(programdataandaddress).The
deviceautomaticallytimestheprogrammingpulse
width,providestheprogramverify,andcountsthe
numberofsequences.AstatusbitsimilartoDATA
pollingandastatusbittogglingbetweenconsecutive
readcycles,providefeedbacktotheuserastothe
statusoftheprogrammingoperation.
MXIC''sAutomaticErasealgorithmrequirestheuserto
onlywriteaneraseset-upcommandanderasecom-
mand.Thedevicewillautomaticallypre-programand
verifytheentirearray.Thenthedeviceautomatically
timestheerasepulsewidth,providestheeraseverify,
andcountsthenumberofsequences.Astatusbit
similartoDATApollingandastatusbittoggling
betweenconsecutivereadcycles,providefeedbackto
theuserastothestatusoftheeraseoperation.
Commandsarewrittentothecommandregisterusing
standardmicroprocessorwritetimings.Registercon-
tentsserveasinputstoaninternalstate-machine
whichcontrolstheeraseandprogrammingcircuitry.
Duringwritecycles,thecommandregisterinternally
latchesaddressanddataneededfortheprogramming
anderaseoperations.Forsystemdesignsimplifica-
tion,theMX28F1000Pisdesignedtosupporteither
WEorCEcontrolledwrites.Duringasystemwrite
cycle,addressesarelatchedonthefallingedgeofWE
orCEwhicheveroccurslast.Dataislatchedonthe
risingedgeofWEorCEwhicheveroccurfirst.To
simplifythefollowingdiscussion,theWEpinisusedas
thewritecyclecontrolpinthroughouttherestofthis
text.Allsetupandholdtimesarewithrespecttothe
WEsignal.
MXIC''sFlashtechnologycombinesyearsofEPROM
experiencetoproducethehighestlevelsofquality,relia-
bility,andcosteffectiveness.TheMX28F1000Pelectri-
callyerasesallbitssimultaneouslyusingFowler-Nord-
heimtunneling.Thebytesareprogrammedonebyteat
atimeusingtheEPROMprogrammingmechanismofhot
electroninjection.
AUTOMATICERASEALGORITHM
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MX28F1000P
TABLE1.COMMANDDEFINITIONS
COMMANDBUSFIRSTBUSCYCLESECONDBUSCYCLE
CYCLESOPERATIONADDRESSDATAOPERATIONADDRESSDATA
ReadMemory1WriteX00H
ReadIdentifiedcodes2WriteX90HReadIAID
Setupautoerase/2WriteX30HWriteX30H
autoerase(chip)
Setupautoerase/2WriteX20HWriteEAD0H
autoerase(block)
Setupautoprogram/2WriteX40HWritePAPD
program
SetupErase/2WriteX20HWriteX20H
Erase(chip)
SetupErase/2WriteX60HWriteEA60H
Erase(block)
Eraseverify2WriteEVAA0HReadXEVD
Reset2WriteXFFHWriteXFFH
Note:
IA=Identifieraddress
EA=Blockofmemorylocationtobeerased
PA=Addressofmemorylocationtobepro-
grammed
ID=DatareadfromlocationIAduringdeviceiden-
tification
PD=DatatobeprogrammedatlocationPA
EVA=Addressofmemorylocationtobereadduring
eraseverify.
EVD=DatareadfromlocationEVAduringerase
verify.
Automodeshavethebuild-inenchancedfeatures.
Pleaseusetheautoerasemodewheneveritis.
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REV.1.6,JAN.19,1999
MX28F1000P
COMMANDDEFINITIONS
WhenlowvoltageisappliedtotheVPPpin,thecon-
tentsofthecommandregisterdefaultto00H,enabling
read-onlyoperation.
PlacinghighvoltageontheVPPpinenablesread/write
operations.Deviceoperationsareselectedbywriting
specificdatapatternsintothecommandregister.Ta-
ble1definestheseMX28F1000Pregistercommands.
Table2definesthebusoperationsofMX28F1000P.
TABLE2.MX28F1000PBUSOPERATIONS
OPERATIONVPP(1)A0A9CEOEWEDQ0-DQ7
READ-ONLYReadVPPLA0A9VILVILVIHDataOut
OutputDisableVPPLXXVILVIHVIHTri-State
StandbyVPPLXXVIHXXTri-State
ReadSiliconID(Mfr)(2)VPPLVILVID(3)VILVILVIHData=C2H
ReadSiliconID(Device)(2)VPPLVIHVID(3)VILVILVIHData=1AH
READ/WRITEReadVPPHA0A9VILVILVIHDataOut(4)
Standby(5)VPPHXXVIHXXTri-State
WriteVPPHA0A9VILVIHVILDataIn(6)
NOTES:
1.VPPLmaybegrounded,ano-connectwitharesistortied
toground,or
voltagespecifiedforthedevice.WhenVPP=VPPL,
memorycontentscanbereadbutnotwrittenorerased.
2.Manufactureranddevicecodesmayalsobeaccessed
viaacommandregisterwritesequence.RefertoTable
1.Allotheraddressesaredon''tcare.
3.VIDistheSilicon-ID-Readhighvoltage.(11.5Vto13v)
4.ReadoperationswithVPP=VPPHmayaccessarray
dataorSiliconIDcodes.
5.WithVPPathighvoltage,thestandbycurrentequalsICC
+IPP(standby).
6.RefertoTable1forvalidData-Induringawriteoperation.
7.XcanbeVILorVIH.
8
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REV.1.6,JAN.19,1999
MX28F1000P
devicereturnstotheReadmode.Thesystemisnot
requiredtoprovideanycontrolortimingduringthese
operations.
WhenusingtheAutomaticChipErasealgorithm,note
thattheeraseautomaticallyterminateswhen
adequateerasemarginhasbeenachievedforthe
memoryarray(noeraseverifycommandisrequired).
Themarginvoltagesareinternallygeneratedinthe
samemanneraswhenthestandarderaseverify
commandisused.
TheAutomaticset-uperasecommandisacommand-
onlyoperationthatstagesthedeviceforautomatic
electricalerasureofallbytesinthearray.Automatic
set-uperaseisperformedbywriting30Htothe
commandregister.
Tocommandautomaticchiperase,thecommand30H
mustbewrittenagaintothecommandregister.The
automaticchiperasebeginsontherisingedgeofthe
WEandterminateswhenthedataonDQ7is"1"and
thedataonDQ6stopstogglingfortwoconsecutive
readcycles,atwhichtimethedevicereturnstothe
Readmode.
SET-UPAUTOMATICBLOCKERASE/ERASE
COMMANDS
Theautomaticblockerasedoesnotrequirethedevice
tobeentirelypre-programmedpriortoexecutingthe
Automaticset-upblockerasecommandand
Automaticblockerasecommand.Uponexecutingthe
Automaticblockerasecommand,thedeviceautomati-
callywillprogramandverifytheblock(s)memoryforan
all-zerodatapattern.Thesystemisnotrequiredto
provideanycontrolsortimingduringtheseoperations.
Whentheblock(s)isautomaticallyverifiedtocontain
anall-zeropattern,aself-timedblockeraseandverify
begin.Theeraseandverifyoperationsarecomplete
whenthedataonDQ7is"1"andthedataonDQ6stops
togglingfortwoconsecutivereadcycles,atwhichtime
thedevicereturnstotheReadmode.Thesystemis
notrequiredtoprovideanycontrolortimingduring
theseoperations.
WhenusingtheAutomaticBlockErasealgorithm,note
thattheeraseautomaticallyterminateswhenadequate
erasemarginhasbeenachievedforthememoryarray
(noeraseverifycommandisrequired).Themargin
READCOMMAND
WhileVPPishigh,foreraseandprogramming,mem-
orycontentscanalsobeaccessedviathereadcom-
mand.Thereadoperationisinitiatedbywriting00H
intothecommandregister.Microprocessorread
cyclesretrievearraydata.Thedeviceremainsen-
abledforreadsuntilthecommandregistercontents
arealtered.
ThedefaultcontentsoftheregisteruponVPPpower-
upis00H.Thisdefaultvalueensuresthatnospurious
alterationofmemorycontentsoccursduringtheVPP
powertransition.WheretheVPPsupplyishard-wired
totheMX28F1000P,thedevicepowersupand
remainsenabledforreadsuntilthecommandregister
contentsarechanged.
SILICON-ID-READCOMMAND
Flash-memoriesareintendedforuseinapplications
wherethelocalCPUaltersmemorycontents.Assuch,
manufacturer-anddevice-codesmustbeaccessible
whilethedeviceresidesinthetargetsystem.PROM
programmerstypicallyaccesssignaturecodesbyrais-
ingA9toahighvoltage.However,multiplexinghigh
voltageontoaddresslinesisnotadesiredsystem-
designpractice.
TheMX28F1000PcontainsaSilicon-ID-Read
operationtosupplementtraditionalPROM-
programmingmethodology.Theoperationisinitiated
bywriting90Hintothecommandregister.Following
thecommandwrite,areadcyclefromaddress0000H
retrievesthemanufacturercodeofC2H.Areadcycle
fromaddress0001Hreturnsthedevicecodeof1AH.
SET-UPAUTOMATICCHIPERASE/ERASE
COMMANDS
Theautomaticchiperasedoesnotrequirethedevice
tobeentirelypre-programmedpriortoexcutingthe
Automaticset-uperasecommandandAutomaticchip
erasecommand.UponexecutingtheAutomaticchip
erasecommand,thedeviceautomaticallywillprogram
andverifytheentirememoryforanall-zerodata
pattern.Whenthedeviceisautomaticallyverifiedto
containanall-zeropattern,aself-timedchiperaseand
verifybegin.Theeraseandverifyoperationsare
completewhenthedataonDQ7is"1"atwhichtimethe
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REV.1.6,JAN.19,1999
MX28F1000P
SET-UPCHIPERASE/ERASECOMMANDS
Set-upChipEraseisacommand-onlyoperationthat
stagesthedeviceforelectricalerasureofallbytesin
thearray.Theset-uperaseoperationisperformedby
writing20Htothecommandregister.
Tocommencechiperasure,theerasecommand(20H)
mustagainbewrittentotheregister.Theerase
operationbeginswiththerisingedgeoftheWEpulse.
Thistwo-stepsequenceofset-upfollowedbyexecu-
tionensuresthatmemorycontentsarenotaccidentally
erased.Also,chip-erasurecanonlyoccurwhenhigh
voltageisappliedtotheVPPpin.Intheabsenceofthis
highvoltage,memorycontentsareprotectedagainst
erasure.
SET-UPBLOCKERASE/ERASECOMMANDS
Set-upBlockEraseisacommand-onlyoperationthat
stagesthedeviceforelectricalerasureofallselected
block(s)inthearray.Theset-uperaseoperationis
performedbywriting60Htothecommandregister.
Toenterblock-erasure,theblockerasecommand60H
mustbewrittenagaintothecommandregister.The
blockerasemodeallows1to8blocksofthearraytobe
erasedinoneinternalerasecycle.Internally,thereare
8registers(flags)addressedbyA14toA16.Firstblock
addressisloadedintointernalregistersonthe2-nd
fallingofWE.Eachsuccessiveblockloadcycles,
startedbythefallingedgeofWE,mustbeginwithin
30msfromtherisingedgeoftheprecedingWE.Other-
wise,theloadingperiodendsandinternalblockerase
cyclestarts.WhenthedataonDQ7is"1"atwhichtime
autoeraseendsandthedevicereturnstotheRead
mode.
ERASE-VERIFYCOMMAND
Aftereacheraseoperation,allbytesmustbeverified.
TheeraseverifyoperationisinitiatedbywritingA0H
intothecommandregister.Theaddressforthebyteto
beverifiedmustbesuppliedasitislatchedonthe
fallingedgeoftheWEpulse.
voltagesareinternallygeneratedinthesamemanner
aswhenthestandarderaseverifycommandisused.
TheAutomaticset-upblockerasecommandisacom-
mandonlyoperationthatstagesthedeviceforauto-
maticelectricalerasureofselectedblocksinthearray.
Automaticset-upblockeraseisperformedbywriting
20Htothecommandregister.
Toenterautomaticblockerase,theusermustwrite
thecommandD0Htothecommandregister.Block
addressesareloadedintointernalregisteronthe2nd
fallingedgeofWE.Eachsuccessiveblockloadcycles,
startedbythefallingedgeofWE,mustbeginwithin
30msfromtherisingedgeoftheprecedingWE.
Otherwise,theloadingperiodendsandinternalauto
blockerasecyclestarts.WhenthedataonDQ7is"1"
andthedataonDQ6stopstogglingfortwo
consecutivereadcycles,atwhichtimeautoerase
endsandthedevicereturnstotheReadmode.
Refertopage2fordetailedblockaddress.
SET-UPAUTOMATICPROGRAM/PROGRAM
COMMANDS
TheAutomaticSet-upProgramisacommand-only
operationthatstagesthedeviceforautomaticpro-
gramming.AutomaticSet-upProgramisperformedby
writing40Htothecommandregister.
OncetheAutomaticSet-upProgramoperationisper-
formed,thenextWEpulsecausesatransitiontoan
activeprogrammingoperation.Addressesare
internallylatchedonthefallingedgeoftheWEpulse.
DataisinternallylatchedontherisingedgeoftheWE
pulse.TherisingedgeofWEalsobeginsthe
programmingoperation.Thesystemisnotrequiredto
providefurthercontrolsortimings.Thedevicewill
automaticallyprovideanadequateinternally
generatedprogrampulseandverifymargin.The
automaticprogrammingoperationiscompletedwhen
thedatareadonDQ6stopstogglingfortwo
consecutivereadcyclesandthedataonDQ7and
DQ6areequivalenttodatawrittentothesetwobits,at
whichtimethedevicereturnstotheReadmode(no
programverifycommandisrequired).
10
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REV.1.6,JAN.19,1999
MX28F1000P
DATAPOLLING-DQ7
TheMX28F1000PalsofeaturesDataPollingasa
methodtoindicatetothehostsystemthatthe
AutomaticProgramorErasealgorithmsareeitherin
progressorcompleted.
WhiletheAutomaticProgrammingalgorithmisinop-
eration,anattempttoreadthedevicewillproducethe
complementdataofthedatalastwrittentoDQ7.Upon
completionoftheAutomaticProgramalgorithman
attempttoreadthedevicewillproducethetruedata
lastwrittentoDQ7.TheDataPollingfeatureisvalid
aftertherisingedgeofthesecondWEpulseofthetwo
writepulsesequences.
WhiletheAutomaticErasealgorithmisinoperation,
DQ7willread"0"untiltheeraseoperationiscom-
pleted.Uponcompletionoftheeraseoperation,the
dataonDQ7willread"1".TheDataPollingfeatureis
validaftertherisingedgeofthesecondWEpulseof
twowritepulsesequences.
TheDataPollingfeatureisactiveduringAutomatic
Program/Erasealgorithms.
POWER-UPSEQUENCE
TheMX28F1000PpowersupintheReadonlymode.In
addition,thememorycontentsmayonlybealteredafter
successfulcompletionofatwo-stepcommandsequence.
Powerupsequenceisnotrequired.
SYSTEMCONSIDERATIONS
Duringtheswitchbetweenactiveandstandbycondi-
tions,transientcurrentpeaksareproducedonthe
risingandfallingedgesofChipEnable.Themagnitude
ofthesetransientcurrentpeaksisdependentonthe
outputcapacitanceloadingofthedevice.Ata
minimum,a0.1uFceramiccapacitor(highfrequency,
lowinherentinductance)shouldbeusedoneach
devicebetweenVCCandGND,andbetweenVPPand
GNDtominimizetransienteffects.Inaddition,to
overcomethevoltagedropcausedbytheinductive
effectsoftheprintedcircuitboardtracesonFLASH
memoryarrays,a4.7uFbulkelectrolyticcapacitor
shouldbeusedbetweenVCCandGNDforeacheight
devices.Thelocationofthecapacitorshouldbeclose
towherethepowersupplyisconnectedtothearray.
TheMX28F1000Pappliesaninternallygenerated
marginvoltagetotheaddressedbyte.ReadingFFH
fromtheaddressedbyteindicatesthatallbitsinthe
byteareerased.
Theerase-verifycommandmustbewrittentothe
commandregisterpriortoeachbyteverificationto
latchitsaddress.Theprocesscontinuesforeachbyte
inthearrayuntilabytedoesnotreturnFFHdata,orthe
lastaddressisaccessed.
InthecasewherethedatareadisnotFFH,another
eraseoperationisperformed.(RefertoSet-upErase/
Erase).Verificationthenresumesfromtheaddressof
thelast-verifiedbyte.Onceallbytesinthearrayhave
beenverified,theerasestepiscomplete.Thedevice
canbeprogrammed.Atthispoint,theverifyoperation
isterminatedbywritingavalidcommand(e.g.
ProgramSet-up)tothecommandregister.TheHigh
ReliabilityErasealgorithm,illustrateshowcommands
andbusoperationsarecombinedtoperformelectrical
erasureoftheMX28F1000P.
RESETCOMMAND
Aresetcommandisprovidedasameanstosafely
aborttheerase-orprogram-commandsequences.
Followingeitherset-upcommand(eraseorprogram)
withtwoconsecutivewritesofFFHwillsafelyabortthe
operation.Memorycontentswillnotbealtered.
Shouldprogram-failorerase-failhappen,two
consecutivewritesofFFHwillresetthedevicetoabort
theoperation.Avalidcommandmustthenbewritten
toplacethedeviceinthedesiredstate.
WRITEOPERATONSTATUS
TOGGLEBIT-DQ6
TheMX28F1000Pfeaturesa"ToggleBit"asamethod
toindicatetothehostsytemthattheAutoProgram/
Erasealgorithmsareeitherinprogressorcompleted.
WhiletheAutomaticProgramorErasealgorithmisin
progress,successiveattemptstoreaddatafromthe
devicewillresultinDQ6togglingbetweenoneand
zero.OncetheAutomaticProgramorErasealgorithm
iscompleted,DQ6willstoptogglingandvaliddatawill
beread.Thetogglebitisvalidaftertherisingedgeof
thesecondWEpulseofthetwowritepulse
sequences.
11
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REV.1.6,JAN.19,1999
MX28F1000P
ABSOLUTEMAXIMUMRATINGS
RATINGVALUE
AmbientOperatingTemperature-40
o
Cto85
o
C
StorageTemperature-65
o
Cto125
o
C
AppliedInputVoltage-0.5Vto7.0V
AppliedOutputVoltage-0.5Vto7.0V
VCCtoGroundPotential-0.5Vto7.0V
A9&VPP-0.5Vto13.5V
NOTICE:
StressesgreaterthanthoselistedunderABSOLUTEMAXI-
MUMRATINGSmaycausepermanentdamagetothede-
vice.Thisisstressratingonlyandfunctionaloperational
sectionsofthisspecificationisnotimplied.Exposuretoab-
solutemaximumratingconditionsforextendedperiodmay
affectreliability.
NOTICE:
Specificationscontainedwithinthefollowingtablesaresub-
jecttochange.
CAPACITANCETA=25
o
C,f=1.0MHz
SYMBOLPARAMETERMIN.TYPMAX.UNITCONDITIONS
CINInputCapacitance14pFVIN=0V
COUTOutputCapacitance16pFVOUT=0V
READOPERATION
DCCHARACTERISTICS
SYMBOLPARAMETERMIN.TYPMAX.UNITCONDITIONS
ILIInputLeakageCurrent10uAVIN=GNDtoVCC
ILOOutputLeakageCurrent10uAVOUT=GNDtoVCC
IPP1VPPCurrent1100uAVPP=5.5V
ISB1StandbyVCCcurrent1mACE=VIH
ISB21100uACE=VCC+0.3V
ICC1OperatingVCCcurrent30(NOTE4)mAIOUT=0mA,f=1MHz
ICC250mAIOUT=0mA,f=11MHz
VILInputLowVoltage-0.3(NOTE1)0.8V
VIHInputHighVoltage2.4VCC+0.3V
VOLOutputLowVoltage0.45VIOL=2.1mA
VOHOutputHighVoltage2.4VIOH=-400uA
NOTES:
1.VILmin.=-1.0Vforpulsewidth<50ns.
VILmin.=-2.0Vforpulsewidth<20ns.
2.VIHmax.=VCC+1.5Vforpulsewidth<20ns
IfVIHisoverthespecifiedmaximumvalue,readoperation
cannotbeguaranteed.
3.Testcondition:
TA=-40°Cto85°C,Vcc=5V±10%,Vpp=GNDtoVcc,CL
=100pF(forMX28F1000P-90/12)
TA=-40°Cto85°C,Vcc=5V±10%,Vpp=GNDtoVcc,CL
=35pF(forMX28F1000P-70)
4.ICC1=35mAforTA=-40°Cto85°C
12
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
NOTE:
1.tDFisdefinedasthetimeatwhichtheoutputachievesthe
opencircuitconditionanddataisnolongerdriven.
TESTCONDITIONS:
?Inputpulselevels:0.45V/2.4V
?Inputriseandfalltimes:<10ns
?Referencelevelsformeasuringtiming:0.8V,2.0V
?28F1000P-70:Vcc=5V±5%,CL:1TTLgate+
35pF(includingscopeandjig)
?28F1000P-70:Vcc=5V±5%,CL:1TTLgate+
35pF(includingscopeandjig)
?Vpp=GNDtoVcc
ACCHARACTERISTICS
28F1000P-7028F1000P-9028F1000P-12
SYMBOLPARAMETERMIN.MAX.MIN.MAX.MIN.MAX.UNITCONDITIONS
tACCAddresstoOutputDelay7090120nsCE=OE=VIL
tCECEtoOutputDelay7090120nsOE=VIL
tOEOEtoOutputDelay303550nsCE=VIL
tDFOEHightoOutputFloat(Note1)015020030nsCE=VIL
tOHAddresstoOutputhold0000nsCE=OE=VIL
READTIMINGWAVEFORMS
ADDRESS
WE
OE
CE
tOH
tDF
tACC
tOE
tCE
ACTIVEMODE
STANDBYMODESTANDBYMODE
DATAOUT
DATAOUTVALID
13
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
COMMANDPROGRAMMING/DATAPROGRAMMING/ERASEOPERATION
DCCHARACTERISTICS
SYMBOLPARAMETERMIN.TYPMAX.UNITCONDITIONS
ILIInputLeakageCurrent10uAVIN=GNDtoVCC
ILOOutputLeakageCurrent10uAVOUT=GNDtoVCC
ISB1StandbyVCCcurrent1mACE=VIH
ISB21100uACE=VCC±0.3V
ICC1(Read)OperatingVCCCurrent30mAIOUT=0mA,f=1MHz
ICC250mAIOUT=0mA,F=11MHz
ICC3(Program)50mAInProgramming
ICC4(Erase)50mAInErase
ICC5(ProgramVerify)50mAInProgramVerify
ICC6(EraseVerify)50mAInEraseVerify
IPP1(Read)VPPCurrent100uAVPP=12.6V
IPP2(Program)50mAInProgramming
IPP3(Erase)50mAInErase
IPP4(ProgramVerify)50mAInProgramVerify
IPP5(EraseVerify)50mAInEraseVerify
VILInputVoltage-0.3(Note5)0.8V
VIH2.4VCC+0.3VV
(Note6)
VOLOutputVoltage0.45VIOL=2.1mA
VOH2.4VIOH=-400uA
NOTES:
1.VCCmustbeappliedbeforeVPPandremovedafterVPP.
2.VPPmustnotexceed14Vincludingovershoot.
3.Aninfluencemaybehadupondevicereliabilityifthedevice
isinstalledorremovedwhileVPP=12V.
4.DonotalterVPPeitherVILto12Vor12VtoVILwhen
CE=VIL.
5.VILmin.=-0.6Vforpulsewidth<20ns.
6.IfVIHisoverthespecifiedmaximumvalue,programming
operationcannotbeguranteed.
7.AllcurrentsareinRMSunlessotherwisenoted.(Sampled,not
100%tested.)
8.For28F1000P-70,Vcc=5V±5%,CL=35pF;for28F1000P-
90/12,Vcc=5V±10%,CL=100pF.
14
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
ACCHARACTERISTICSTA=-40
o
Cto85
o
C,VCC=5V±10%,VPP=12V±5%
28F1000-7028F1000P-9028F1000P-12
SYMBOLPARAMETERMIN.MAX.MIN.MAX.MIN.MAX.UNITCONTIONS
tVPSVPPsetuptime100100100ns
tOESOEsetuptime100100100ns
tCWCCommandprogrammingcycle7090120ns
tCEPWEprogrammingpulsewidth404550ns
tCEPH1WEprogrammingplusewidthHigh202020ns
tCEPH2WEprogrammingplusewidthHigh100100100ns
tASAddresssetuptime000ns
tAHAddressholdtime404550ns
tAH1AddressholdtimeforDATAPOLLING000ns
tDSDatasetuptime404550ns
tDHDataholdtime101010ns
tCESPCEsetuptimebeforeDATApolling/togglebit100100100ns
tCESCEsetuptime000ns
tCESCCEsetuptimebeforecommandwrite100100100ns
tCESVCEsetuptimebeforeverify666us
tVPHVPPholdtime100100100ns
tDFOutputdisabletime(Note3)152030ns
tDPADATApolling/togglebitaccesstime7090120ns
tAETCTotalerasetimeinautochiperase5(TYP.)5(TYP.)5(TYP.)s
tAETBTotalerasetimeinautoblockerase5TYP.)5(TYP.)5(TYP.)s
tAVTTotalprogrammingtimeinautoverify153001530015300us
tBALCBlockaddressloadcycle0.3300.3300.330us
tBALBlockaddressloadtime200200200us
tCHCEHoldTime000ns
tCSCEsetuptoWEgoinglow000ns
NOTES:
1.CEandOEmustbefixedhighduringVPPtransitionfrom5V
to12Vorfrom12Vto5V.
2.RefertoreadoperationwhenVPP=VCCaboutreadopera-
tionwhileVPP12V.
3.tDFdefinedasthetimeatwhichtheoutputachievestheopen
circuitconditionanddataisnolongerdriven.
15
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
SWITCHINGTESTCIRCUITS
SWITCHINGTESTWAVEFORMS
2.0V
2.4V
0.45V
0.8V
TESTPOINTS
INPUT
2.0V
0.8V
OUTPUT
ACTESTING:Inputsaredrivenat2.4Vforalogic"1"and0.45Vforalogic"0".
Inputpulseriseandfalltimesare<20ns.
DEVICE
UNDER
TEST
DIODES=IN3064
OREQUIVALENT
CL=100pFincludingjigcapacitance(35pFfor70nsparts)
6.2Kohm
1.8Kohm
+5V
CL
16
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
AUTOMATICPROGRAMMINGTIMINGWAVEFORM
Onebytedataisprogrammed.Verifyinfastalgorithm
andadditionalprogrammingbyexternalcontrolarenot
requiredbecausetheseoperationsareexcutedauto-
maticallybyinternalcontrolcircuit.Programming
completioncanbeverifiedbyDATApollingandtogglebit
checkingafterautomaticverifystarts.Deviceoutputs
DATAduringprogrammingandDATAafterprogramming
onQ7.Q0toQ5(Q6isfortogglebit;seetogglebit,DATA
polling,timingwaveform)areinhighimpedance.
tCWC
Address
valid
tAS
tCEP
tOES
tCEPtCESPtCES
tCESC
tDStDHtDHtDS
tDF
DatainCommandin
DatainCommandin
Vcc5V
CE
OE
tAVT
12V
Vpp
0V
Command#40H
tVPH
tVPS
Q7
Q0~Q5
DATApolling
Autoprogram&DATApolling
Setupautoprogram/
programcommand
DATADATA
WE
A0~A16
tCEPH1
tAH1
DATA
tDPA
17
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
AUTOMATICPROGRAMMINGALGORITHMFLOWCHART
START
ApplyVppH
WriteSetupautoprogramCommand(40H)
NO
ToggleBitChecking
DQ6notToggled
WriteAutoprogramCommand(A/D)
LastByte
AutoProgramCompleted
YES
YES
NO
VerifyByteOk
AutoProgramFailed
NO
YES
Reset
18
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
erasestarts.Deviceoutputs0duringerasureand1after
erasureonQ7.Q0toQ5(Q6isfortogglebit;seetoggle
bit,DATApolling,timingwaveform)areinhighimped-
ance.
AUTOMATICCHIPERASETIMINGWAVEFORM
Alldatainchipareerased.Externaleraseverifyisnot
requiredbecausedataiserasedautomaticallybyinternal
controlcircuit.Erasurecompletioncanbeverifiedby
DATApollingandtogglebitcheckingafterautomatic
tCWC
tCEP
tOES
tCEPtCESPtCEStCESC
tDStDHtDHtDS
tDF
Commandin
Commandin
Vcc5V
CE
OE
tAETC
Commandin
Commandin
12V
Vpp
0V
Command#30HCommand#30H
tVPH
tVPS
Q7
Q0~Q5
Autochiperase&DATApolling
DATApolling
A0~A16
WE
tCEPH1
Setupautochiperase/
erasecommand
tDPA
19
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
AUTOMATICCHIPERASEALGORITHMFLOWCHART
START
ApplyVppH
WriteSetupautochipEraseCommand(30H)
ToggleBitChecking
DQ6notToggled
WriteAutochipEraseCommand(30H)
DATAPolling
DQ7=1
AutoChipEraseCompleted
YES
YES
AutoChipEraseFailed
Reset
No
No
20
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
checkingafterautomaticerasestarts.Deviceoutputs0
duringerasureand1aftererasureonQ7.Q0toQ5(Q6
isfortogglebit;seetogglebit,DATApolling,timing
waveform)areinhighimpedance.
AUTOMATICBLOCKERASETIMINGWAVEFORM
BlockdataindicatedbyA12toA16areerased.External
eraseverifyisnotrequiredbecausedataareerased
automaticallybyinternalcontrolcircuit.Erasurecomple-
tioncanbeverifiedbyDATApollingandtogglebit
Refertopage2fordetailedblockaddress.
Vcc5V
tCEPtOES
tDF
Commandin
OE
Commandin
CommandinCommandin
tCESC
tDStDHtDStDH
Block
address0
Block
address1
tCWC
tAStAH
tBALC
tCEP
12V
Vpp
0V
Block
address#
Command#20HCommand#D0H
tVPH
tVPS
tBAL
tAETB
Q7
Q0~Q5
Autoblockerase&DATApolling
DATApolling
A12~A16
CE
WE
tCEPH2
tCEPH1
tCH
tCS
tAH1
Setupautoblockerase/erasecommand
tDPA
A0~A11
21
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
AUTOMATICBLOCKERASEALGORITHMFLOWCHART
START
ApplyVppH
WriteSetupautoblockEraseCommand(20H)
NO
WriteAutoblockEraseCommand(D0H)
toLoadBlockAddress
ToggleBitChecking
DQ6notToggled
AutoBlockEraseCompleted
YES
LastBlock
toErase
Wait200us
YES
DATAPolling
DQ7=1
Reset
AutoBlockEraseFailed
NO
NO
YES
LoadBlockAddress
22
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
COMPATIBLECHIPERASETIMINGWAVEFORM
Alldatainchipareerased.Controlverificationand
additionalerasureexternallyaccordingtocompatiblechip
eraseflowchart.
Vcc5V
tCEPtOES
tDF
Commandin
CE
OE
Commandin
tCESC
tCEP
tDStDHtDStDH
tCWC
tET
tCEP
tCES
tVA
Commandin
Commandin
tDS
12V
Vpp
0V
Command#20HCommand#20HCommand#A0H
tVPH
tVPS
Q7
Q0~Q6
EraseVerifyChiperase
tAStAH
Verify
Address
tCESV
Commandin
Commandin
tDH
Datavalid
Datavalid
A0~A16
WE
tCEPH1
Setupchiperase/
erasecommand
23
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
COMPATIBLEBLOCKERASE
Thisdevicecanbeappliedtothecompatibleblockerase
algorithmshowninthefollowingflowchart.Thisalgorithm
allowstoobtainfastererasetimebytheblock(16Kbyte
x8block)withoutanyvoltagestresstothedevicenor
deteriorationinreliabilityofdata.
BLOCKERASEFLOW
COMPATIBLEBLOCKERASEFLOWCHART
START
Apply
WRITESETUPBLOCKERASECOMMAND
END
VPP=VPPH
WRITEBLOCKERASECOMMAND
(60H)
WAIT
10ms
(LOADFIRSTSECTORADDRESS,60H)
LOADOTHERSECTORS''ADDRESS
IFNECESSARY
(LOADOTHERSECTORADDRESS)
START
END
NO
YES
FAIL
ALLBITSVERIFIED
N=0
BLOCKERASEFLOW
ERSVFYFLOW
N=1024?
BLOCKERASEFAIL
APPLY
VPP=VCC
BLOCKERASE
COMPLETE
N=N+1
Forselectedblock(s),
AllbitsPGM"0"
24
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
ERASEVERIFYFLOW
START
WRITEERASEVERIFYCOMMAND
WAIT6us
LASTADDRESS?
INCREMENTADDRESS
NO
YES
NO
YES
APPLY
VPP=VPPH
ADDRESS=
FIRSTADDRESSOFERASEDBLOCKS
ORLASTVERIFYFAILEDADDRESS
(A0H)
ERSVFY
FFH?
ERASEVERIFY
COMPLETE
GOTOERASEFLOW
AGAINORABORT
25
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
COMPATIBLEBLOCKERASETIMINGWAVEFORM
Indicatedblockdata(16Kbyte)areerased.Control
verificationandadditionalerasureexternallyaccordingto
compatibleblockeraseflowchart.
Vcc5V
tDS
tDF
Commandin
Commandin
tDStDHtDStDH
tVA
Commandin
Commandin
Commandin
Commandin
tDH
tBALtET
tCEP
tAStAH
tCESC
tOEStCEPtCEP
tCWCtBALC
Block
address0
Block
address1
tAStAH
A0~A13
CE
OE
12V
Vpp
0V
Command#60HCommand#60H
Command#A0H
tVPH
tVPS
Q7
Q0~Q6
EraseVerify
Blockerase
tCESV
tCES
Datavalid
Datavalid
Verify
address
Verify
address
A14~A16
WE
Block
address#
tCEPH1
tCEPH2
Setupblockerase/erasecommand
26
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
VPPLOWIDCODEREADTIMINGWAVEFORM
VPPHIGHREADTIMINGWAVEFORM
tACC
tCE
tACC
tOE
tOH
tOH
tDF
ManufacturercodeDevicecode
C2H1AH
VID
VIH
VIL
A9
A0
A1-A8
A10-A16
CE
OE
Q0-Q7
WE
VIH
tVPS
Addressvalid
tACC
tVPH
tCESC
tCWC
tOES
tCEP
tCE
tOES
tDF
tOH
tDStDHtOE
CommandinDataoutvalid
Vcc5V
12V
Vpp
0V
A0-A16
CE
OE
Q0-Q7
00H
tCEPH1
WE
27
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
VPPHIGHIDCODEREADTIMINGWAVEFORM
RESETTIMINGWAVEFORM
tCWC
tVPS
AddressValid0or1
tACC
tVPH
tCESC
tOES
tCEP
tCE
tOES
tDF
tOH
tDStDHtOE
CommandinDataoutvalid
Vcc5V
12V
Vpp
0V
A0
CE
OE
Q0-Q7
90HC2Hor1AH
A1-A16
tCEPH2
WE
tVPS
tCWC
tOES
tCEP
Commandin
Vcc5V
12V
Vpp
0V
CE
OE
Q0-Q7
FFHFFH
A0-A16
tCEP
tDStDH
tDStDH
Commandin
tCEPH1
WE
28
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
TogglebitappearsinQ6,whenprogram/eraseis
opperating.DATApollingappearsinQ7duringpro-
grammingorerase.
TOGGLEBIT,DATAPOLLINGTIMINGWAVEFORM
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
DATADATADATADATA
DATA
DATA
Vpp12V
CE
OE
Q6
DURINGP/E
Q7
DURINGP
Q7
DURINGE
Q0~Q5
DATAPOLLING
DATAPOLLING
PROGRAM/ERASECOMPLETE
TOGGLEBIT
HIGH
WE
LIMITS
PARAMETERMIN.TYP.MAX.UNITS
Chip/SectorEraseTime1.520sec
ChipProgrammingTime213.8sec
Erase/ProgramCycles10,000cycles
ByteProgramTime15642us
ERASEANDPROGRAMMINGPERFORMANCE
29
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
ORDERINGINFORMATIONPLASTICPACKAGE
PARTNO.ACCESSTIMEOPERATINGSTANDBYPACKAGEERASE/PROGRAM
CURRENTCURRENTCYCLE
(ns)MAX.(mA)MAX.(uA)MIN.(time)
MX28F1000PPC-70C4705010032PinDIP10,000
MX28F1000PPC-90C4905010032PinDIP10,000
MX28F1000PPC-12C41205010032PinDIP10,000
MX28F1000PQC-70C4705010032PinPLCC10,000
MX28F1000PQC-90C4905010032PinPLCC10,000
MX28F1000PQC-12C41205010032PinPLCC10,000
MX28F1000PTC-70C4705010032PinTSOP10,000
(NormalType)
MX28F1000PTC-90C4905010032PinTSOP10,000
(NormalType)
MX28F1000PTC-12C41205010032PinTSOP10,000
(NormalType)
MX28F1000PRC-70C4705010032PinTSOP10,000
(ReverseType)
MX28F1000PRC-90C4905010032PinTSOP10,000
(ReverseType)
MX28F1000PRC-12C41205010032PinTSOP10,000
(ReverseType)
MX28F1000PPI-70705010032PinDIP10,000
MX28F1000PPI-90905010032PinDIP10,000
MX28F1000PPI-121205010032PinDIP10,000
MX28F1000PQI-70705010032PinPLCC10,000
MX28F1000PQI-90905010032PinPLCC10,000
MX28F1000PQI-121205010032PinPLCC10,000
MX28F1000PTI-70705010032PinTSOP10,000
(NormalType)
MX28F1000PTI-90905010032PinTSOP10,000
(NormalType)
MX28F1000PTI-121205010032PinTSOP10,000
(NormalType)
MX28F1000PRI-70705010032PinTSOP10,000
(ReverseType)
MX28F1000PRI-90905010032PinTSOP10,000
(ReverseType)
MX28F1000PRI-121205010032PinTSOP10,000
(ReverseType)
30
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
PACKAGEINFORMATION
32-PINPLASTICDIP
ITEMMILLIMETERSINCHES
A42.13max.1.660max.
B1.90[REF].075[REF]
C2.54[TP].100[TP]
D.46[Typ.].050[Typ.]
E38.071.500
F1.27[Typ.].050[Typ.]
G3.30±.25.130±.010
H.51[REF].020[REF]
I3.94±.251.55±.010
J5.33max..210max.
K15.22±.25.600±.101
L13.97±.25.550±.010
M.25[Typ.].010[Typ.]
NOTE:Eachleadcerterlineislocatedwithin
.25mm[.01inch]ofitstrueposition[TP]ata
maximumatmaximummaterialcondition.
32-PINPLASTICLEADEDCHIPCARRIER(PLCC)
ITEMMILLIMETERSINCHES
A12.44±.13.490±.005
B11.50±.13.453±.005
C14.04±.13.553±.005
D14.98±.13.590±.005
E1.93.076
F3.30±.25.130±.010
G2.03±.13.080±.005
H.51±.13.020±.005
I1.27[Typ.].050[Typ.]
J.71[REF].028[REF]
K.46[REF].018[REF]
L10.40/12.94.410/.510
(W)(L)(W)(L)
M.89R.035R
N.25[Typ.].010[Typ.]
NOTE:Eachleadcerterlineislocatedwithin
.25mm[.01inch]ofitstrueposition[TP]ata
maximumatmaximummaterialcondition.
1
B
A
4
5
9
13
14
17
20
21
25
29
32
CD
E
F
G
H
I
K
J
L
M
N
30
A
1732
161
F
D
E
C
B
H
IJ
G
M0~15?
K
L
31
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
32-PINPLASTICTSOP
ITEMMILLIMETERSINCHES
A20.0±.20.078±.006
B18.40±.10.724±.004
C8.20max..323max.
D0.15[Typ.].006[Typ.]
E.80[Typ.].031[Typ.]
F.20±.10.008±.004
G.30±.10.012±.004
H.50[Typ.].020[Typ.]
I.45max..018max.
J0~.200~.008
K1.00±.10.039±.004
L1.27max..050max.
M.50.020
N0~5°.500
NOTE:Eachleadcerterlineislocatedwithin
.25mm[.01inch]ofitstrueposition[TP]ata
maximumatmaximummaterialcondition.
A
B
C
D
E
FGHI
J
KL
M
N
O
32
P/N:PM0340
REV.1.6,JAN.19,1999
MX28F1000P
Note.RevisionHistory
Revision#DescriptionPageDate
1.4Fastaccesstime150nsand1,000timeserasecyclesremoved.
Tsoppinconfigurationdiagramrotated180°.
Theflowchartofblockerasecorrected.
1.5Fastaccesstime70nsadded.Dec/26/1996
1.61)Absolutemax.ratings:TA=-40°Cto85°CP11JAN/19/1999
2)DCCharacteristics:ICC1=35mAforTA=-40°Cto85°C
3)ACCharacteristics:TA=-40°Cto85°CP14
4)OrderInformance:AddIndustrialGradeP29
5)Erase&ProgrammingPerformance:NewinCreasedtable
33
MX28F1000P
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