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Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

 zjshzq 2024-09-24 发布于浙江
Future远见
Future远见
2024-09-23 11:18

近日,贵州大学王旭团队联合南方科技大学量子科学与工程研究院王钊以「Cooperative engineering the multiple radio-frequency fields to reduce the X-Junction barrier for ion trap chips」¹为题在Chip上发表研究论文,报道了利用多射频场协同优化离子阱芯片结电极附近的囚禁势场分布,以降低囚禁势垒和反常声子加热的方法。第一作者为刘亚瑞、共同第一作者王钊,通讯作者为王钊、王旭。本文被遴选为本期封面文章和本期Featured in Chip编辑特选文章之一。Chip是全球唯一聚焦芯片类研究的综合性国际期刊,是入选了国家高起点新刊计划的「三类高质量论文」期刊之一。

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

离子阱量子比特以其长相干时间、高保真度的量子态制备与操控、全连通性等特点成为量子计算领域中非常有希望实现高保真度可扩展的物理体系²⁻³,并在实验中已经演示了量子纠错的基本原理。目前研究的热点在于解决系统的扩展性问题。基于量子电荷耦合器件(Quantum Charge-coupled Device,QCCD)架构的离子阱芯片通过扩展一维离子量子比特至二维、划分不同功能区实现量子逻辑操作,可以有效提高离子量子比特数量并保持比特的高保真度。结合微加工技术,有效降低了控制电极的尺寸,提高了系统的一致性。

然而,QCCD架构下的离子阱芯片,需要离子在不同功能区域之间进行穿梭输运。输运过程中电场噪声会对离子携带的声子量子比特进行加热、破坏声子态信息,而输运时间可占量子算法运行总时间的60%以上⁴。因此,如何降低离子的声子加热率、缩短输运时间就成为QCCD架构中待解决的重要问题。另一方面,QCCD构架下离子的运动被扩展至二维平面,不可避免的会出现转弯、直行等不同种类的输运方式,也需要不同形状的电极⁵。以往的研究中,结附近囚禁势场的连通性、结势垒高度的优化,均通过RF电极几何形状的改变实现,但优化后的囚禁电场,由于需要在多个方向具有对称性,因而也降低了中心附近的势阱深度和囚禁频率,从而容易引起离子丢失、以及混合离子种类的输运分离效应等问题。同时,对电极几何形状进行优化,需要每次对不同形状的电极重新计算其产生的电场,时间复杂度开销很高。此外,电极形状在加工后即被固定,便无法对抗加工过程中的偏差,也无法满足需要随时间变化的囚禁势场的产生。

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

图1 | a, RF电极的分割;b, RF电压分布优化前后的势垒高度。

本文提出的多射频场协同优化离子囚禁势场方法,通过将原有单一的RF囚禁电极分割为多个独立子电极,并在每个子电极上施加幅度可调的同频独立RF电压,通过改变加载RF电压的幅度分布,引起结附近囚禁电场的实时改变,实现结势垒的优化与降低。文章以X形结为例,对提出方法进行了模拟与验证。模拟结果表明,经过RF电压幅度分布优化的囚禁势垒(图1b黄色与灰色实线)比未优化电压分布前,使用相同电极产生的囚禁势垒(图1b蓝色实线)降低了4倍以上。

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

图2 | RF电极图形与RF电压分布混合优化时,分别优化转弯(a)与直行(b)两种情况下的电极图形与电压分布。

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

图3 | 针对转弯情况输运进行图形与电压分布混合优化前后的囚禁赝势分布。

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

图4 | 针对直线输运情形进行图形与电压分布混合优化前后的囚禁赝势分布。

在此基础上,文章还研究了结合电极图形优化与RF电压分布幅度优化的混合优化方法。分别针对转弯与直线输运过结两种情况,对结中心附近的4个RF电极形状进行了优化,并进一步应用多RF电压幅度优化方法。结果表明,单独使用RF电极图形优化(通过增加「手指」图形、增加「劈形」电极)与RF电压分布优化两种方法分别对结势垒优化,优化后的势垒高度相差不大,而混合应用两种方法对转弯、直线(图2)输运势垒进行优化,结果相比单独利用其中任何一种方法更低(图3a中黄色实线、图4a中灰色实线)。图3与图4分别绘制了优化后的转弯与直线输运情形下赝势管道的三维分布。

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

图5 |应用多RF场方法对RF电压分布进行优化后,转弯(a)与直行(b)所需的RF独立信道数。每种情况均只需4个独立RF信号。

最后,文章讨论了多RF场方法应用时所需的电压切换协议与RF独立通道数的问题,讨论了应用于多个结电极时的可行性。起终点不同的离子输运有多种可能路径,但均可归纳为转弯与直线两种输运类型,仅需针对转弯与直线输运分别进行一次电压分布的优化,再根据起终点位置在正确方向施加已优化的RF电压分布,即可实现各个方向的离子输运。文章研究的多RF场优化方法是对RF电极产生的囚禁赝势为零的输运路径(赝势管道形状)进行控制、施加的RF电压为静态;而驱动离子输运所需的电压为DC电极产生的含时变化的DC电压,二者作用效果不同、相互独立,因此离子输运所需的DC电压波形设计可直接沿用以往方法。此外,优化RF电压分布时增加了电压对称性分布的约束,因此在单个结内仅需4个独立控制的射频通道(图5)。因此文章提出的多RF场结电极设计与控制方法可同时应用于多个结电极,具有良好的可扩展性,是QCCD架构下的离子阱芯片中离子输运的重要实现手段。

Cooperative engineering the multiple radio-frequency fields to reduce the X-junction barrier for ion trap chips¹

Ion trap qubits are a promising physical system in quantum computing due to their long coherence time, high-fidelity quantum state preparation and manipulation, and full connectivity²⁻³. Experiments have demonstrated the basic principles of quantum error correction. However, the scalability problem remains a major research challenge. To overcome this, researchers are exploring the use of the ion trap chip method based on the quantum charge-coupled device (QCCD) architecture. This approach extends one-dimensional ion qubits to two dimensions and divides different functional areas to effectively increase the number of ion qubits while maintaining high fidelity. Additionally, micromachining technology is used to reduce the size of the control electrode and improve the consistency of the system.

The QCCD architecture relies on an ion trap chip that requires ions to be shuttled between different functional areas.However, during transportation, electric field noise can heat the phonon qubits carried by the ions, leading to the destruction of phonon state information. Additionally, transportation time can account for more than 60% of the total running time of the quantum algorithm⁴. Thus, reducing the phonon heating rate of ions and shortening the transport time are critical challenges that need to be addressed in the QCCD architecture. Moreover, the shuttling of ions in the QCCD framework occurs in a two-dimensional plane, which necessitates different types of transport modes such as turning and straight travel. As a result, electrodes with different geometries are required⁵. In previous studies, changing the geometry of the RF electrode achieved connectivity of the trapping potential field near the junction and optimization of the junction barrier height. However, the optimized trapping electric field required symmetry in multiple directions, reducing the potential well depth and trapping frequency near the center. This quickly resulted in problems such as ion loss and transport separation effects of mixed ion species. Optimizing the electrode geometry also required recalculating the electric field generated by electrodes of different shapes in each round, necessitating high time complexity. Furthermore, the shape of the electrode is fixed immediately after processing and cannot resist deviation during processing, nor can it satisfy the generation of the trapping potential field that needs to change with time.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

Fig. 1 | a, Segmentation of the RF electrode. b, Poseudo-potential barrier before and after RF voltage distribution optimization.

The multi-RF field collaborative optimization method for the ion trapping potential field proposed in this article divides the original single RF trapping electrode into multiple independent sub-electrodes. It applies an independent RF voltage of the same frequency with adjustable amplitude to each sub-electrode. Changing the amplitude distribution of the loaded RF voltage causes real-time changes in the trapped electric field near the junction, thereby optimizing and reducing the junction barrier. The article takes the X-shaped junction as an example to simulate and verify the method. The simulation results show that the trapping barrier (yellow and grey solid lines in Fig. 1b) after RF voltage amplitude distribution optimization is four times lower than the trapping barrier generated using the same electrode (blue solid line in Fig. 1b) before the voltage distribution is optimized.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

Fig. 2 | When the RF electrode shape and RF voltage distribution optimization method are hybrid, the optimization results for the corner-turning (a) and straight-froward shuttling (b), respectively.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

Fig. 3 | The distribution of trapped pseudopotentials before and after hybrid optimization for corner-turning shuttling shapes.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

Fig. 4 | The distribution of trapped pseudopotentials before and after hybrid optimization for straight-forward shuttling shapes.

The article also studied a hybrid optimization method that combines electrode geometry optimization and RF voltage distribution optimization. The shapes of the four RF electrodes near the junction center were optimized for turning and straight-line transportation. We are applying the multi-RF voltage optimization method based on this optimization result. The hybrid optimizing results show that when individually using the optimization method, no matter the RF electrode geometry optimization (by adding a 'finger' shape and 'cleaved' shape) or the RF voltage distribution optimization, the final RF barrier heights are similar. However, the hybrid optimization gives a further lower result, both for corner-turning (Fig. 2a) and straight-forward (Fig. 2b) shuttling (yellow line in Fig. 3a, grey solid line in Fig. 4a). Fig. 3b and 4b plot the distribution of pseudopotential tubes in three dimensions for corner-turning and straight-forward shuttling respectively.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

Fig. 5 | The number of independent RF channels required for turning (a) and going straight (b) after applying the multi-RF field method to optimize the RF voltage distribution. Only four independent RF signals are required in each case.

The article provides an overview of the voltage-switching protocol and the minimum number of independent RF channels required to apply the multi-RF field method. It also examines the feasibility of applying this method to multiple junction electrodes. There are two types of ion shuttling paths: corner-turning and straight-forward shuttling. Although there are many possible paths with different starting and ending points, they can all be summarized into these two types. To optimize the RF voltage distribution, it is only necessary to optimize it once for each type of shuttling, and then apply the RF voltages according to the correct path direction. Once the RF voltage distribution has been optimized in one direction, it can be used for ion shuttling along all four directions. The multi-RF field optimization method studied in this article controls the shuttling path (pseudopotential tube shape) where the trapped pseudopotential is zero. The applied RF voltages are static, while the DC voltages required to drive ion shuttling are time-varying. The DC voltages have different effects from the RF voltages. Therefore, the DC waveform design required for ion shuttling can follow the previous method. In addition, the optimization process for RF voltage distribution now includes the constraint of voltage symmetry distribution. Hence, only four independently controlled RF channels are needed within a single junction (Fig. 5). The proposed multi-RF field junction electrode design and control method can be applied to multiple junction electrodes simultaneously and is highly scalable.

参考文献:

1. Liu, Y. et al. Cooperative engineering the multiple radio-frequency fields to reduce the X-Junction barrier for ion trap chips.Chip 3, 100078 (2023).

2. Wu, W., Zhang, T. & Chen, P.-X. Quantum computing and simulation with trapped ions: on the path to the future. Fund. Res. 1, 213-216 (2021).

3. Brown, K. R., Kim, J. & Monroe, C. Co-designing a scalable quantum computer with trapped atomic ions. npj Quantum Inform. 2, 16034 (2016).

4. Moses, S. A. et al. A race track trapped-ion quantum processor. Preprint at https:///10.48550/arXiv.2305.03828 (2023).

5. Kaushal, V. et al. Shuttling-based trapped-ion quantum information processing.AVS Quantum Sci. 2, 014101 (2020).

论文链接:

https://www./science/article/pii/S2709472323000412

作者简介

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

刘亚瑞,贵州大学硕士研究生(已毕业),主要研究方向为稳定囚禁离子阱电极的设计与优化。

Liu Yarui received his master degree from Guizhou University in 2023. His main research direction is design and optimization of stable ion trap electrodes.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

王钊,南方科技大学量子科学与工程研究院助理研究员,博士毕业于中国科学技术大学中科院量子信息重点实验室,主要从事基于离子阱体系的量子计算与可扩展离子芯片的研究。

Wang Zhao is an assistant researcher at the Institute of Quantum Science and Engineering of the Southern University of Science and Technology. He received his Ph.D. in 2016 from the CAS Key Laboratory of Quantum Information at the University of Science and Technology of China, Hefei, China. His research interests focus on ion trap quantum computing and scalable ion chips.

Chip发表王旭团队成果:协调优化多射频场降低离子阱芯片X结势垒

王旭,贵州大学物理电子学教授。于四川大学获微电子学士学位(2007年),和牛津大学凝聚态物理博士学位(2012年)。他的主要研究领域是量子信息和人工智能,从事面向未来能源发展的新型功能材料与光电子器件研究。

Xu Wang completed his PhD studies at University of Oxford in 2012. Then he returned to Guizhou University in 2013 as Professor of Physics and Electronics. Since 2019, he has also become a graduate tutor of Tsinghua University in Beijing, China. His research and teaching focus on the areas of energy related advanced materials.

关于Chip

Chip(ISSN:2772-2724,CN:31-2189/O4)是全球唯一聚焦芯片类研究的综合性国际期刊,已入选由中国科协、教育部、科技部、中科院等单位联合实施的「中国科技期刊卓越行动计划高起点新刊项目」,为科技部鼓励发表「三类高质量论文」期刊之一。

Chip期刊由上海交通大学出版,联合Elsevier集团全球发行,并与多家国内外知名学术组织展开合作,为学术会议提供高质量交流平台。

Chip秉承创刊理念: All About Chip,聚焦芯片,兼容并包,旨在发表与芯片相关的各科研领域尖端突破性成果,助力未来芯片科技发展。迄今为止,Chip已在其编委会汇集了来自14个国家的70名世界知名专家学者,其中包括多名中外院士及IEEE、ACM、Optica等知名国际学会终身会士(Fellow)。

Chip第三卷第一期已于2024年3月在爱思维尔Chip官网以金色开放获取形式(Gold Open Access)发布,欢迎访问阅读本期最新文章。

爱思唯尔Chip官网:

https://www./journal/chip

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